diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index bb197fc5d86e1..7023f0d76eac9 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -401,6 +401,7 @@ dtb-$(CONFIG_ARCH_QCOM) += x1p42100-lenovo-thinkbook-16.dtb x1p42100-lenovo-thin lemans-evk-camx-dtbs := lemans-evk.dtb lemans-evk-camx.dtbo dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-camx.dtb +dtb-$(CONFIG_ARCH_QCOM) += monaco-arduino-monza.dtb monaco-evk-camx-dtbs := monaco-evk.dtb monaco-evk-camx.dtbo diff --git a/arch/arm64/boot/dts/qcom/monaco-arduino-monza.dts b/arch/arm64/boot/dts/qcom/monaco-arduino-monza.dts new file mode 100644 index 0000000000000..ca14f0ea4dae6 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/monaco-arduino-monza.dts @@ -0,0 +1,466 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include +#include +#include + +#include "monaco.dtsi" +#include "monaco-pmics.dtsi" +#include "monaco-monza-som.dtsi" + +/ { + model = "Arduino VENTUNO Q"; + compatible = "arduino,monza", "qcom,qcs8300"; + + aliases { + ethernet0 = ðernet0; + i2c1 = &i2c1; + serial0 = &uart7; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-0 = <&gpio_keys_default>; + pinctrl-names = "default"; + + button-home { + label = "Home Key"; + linux,code = ; + gpios = <&tlmm 79 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + label = "hdmi"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&adv7535_out>; + }; + }; + }; + + sound { + compatible = "qcom,qcs8275-sndcard"; + model = "arduino-monza"; + audio-routing = "IN12", "Headset Mic12", + "Headset Mic12", "MICBIAS", + "IN56", "Headset Mic56", + "Headset Mic56", "MICBIAS", + "MIC1", "MICBIAS", + "Headphone", "HPL", + "Headphone", "HPR", + "Receiver", "RCVL", + "Receiver", "RCVR", + "Speaker", "SPKL", + "Speaker", "SPKR"; + + pinctrl-0 = <&quad_mi2s_active>, <&quad_mclk_active>, <&lpi_i2s4_active>; + pinctrl-names = "default"; + + pri-i2s-playback-dai-link { + link-name = "Analog Playback"; + + codec { + sound-dai = <&max98091>; + }; + + cpu { + sound-dai = <&q6apmbedai 137>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + + pri-i2s-capture-dai-link { + link-name = "Analog Capture"; + + codec { + sound-dai = <&max98091>; + }; + + cpu { + sound-dai = <&q6apmbedai 138>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + + hdmi-mi2s-playback-dai-link { + link-name = "HDMI Playback"; + + codec { + sound-dai = <&adv7535>; + }; + + cpu { + sound-dai = <&q6apmbedai 145>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + }; + + vdc_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "vdc_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vdc_1v8: regulator-1v8 { + compatible = "regulator-fixed"; + regulator-name = "vdc_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vdc_5v: regulator-5v0 { + compatible = "regulator-fixed"; + regulator-name = "vdc_5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + startup-delay-us = <20000>; + }; + + vreg_nvme: regulator-3p3-m2 { + compatible = "regulator-fixed"; + regulator-name = "vreg_m2_3p3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>; + enable-active-high; + startup-delay-us = <20000>; + }; +}; + +ðernet0 { + phy-mode = "2500base-x"; + phy-handle = <&hsgmii_phy0>; + + pinctrl-0 = <ðernet0_default>; + pinctrl-names = "default"; + + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + hsgmii_phy0: ethernet-phy@1c { + compatible = "ethernet-phy-id004d.d101"; + reg = <0x1c>; + reset-gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <70000>; + }; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,route-up; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0xc>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <4>; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + }; +}; + +&i2c12 { + clock-frequency = <400000>; + + status = "okay"; + + max98091: audio-codec@10 { + compatible = "maxim,max98091"; + reg = <0x10>; + pinctrl-0 = <&max98091_default>; + pinctrl-names = "default"; + interrupts-extended = <&tlmm 16 IRQ_TYPE_LEVEL_HIGH>; /* GPIO_16 */ + clocks = <&q6prmcc LPASS_CLK_ID_MCLK_3 LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + }; + + adv7535: bridge@3d { + compatible = "adi,adv7535"; + reg = <0x3d>; + pinctrl-0 = <&adv7535_default>; + pinctrl-names = "default"; + interrupts-extended = <&tlmm 93 IRQ_TYPE_EDGE_FALLING>; + avdd-supply = <&vdc_1v8>; + dvdd-supply = <&vdc_1v8>; + pvdd-supply = <&vdc_1v8>; + a2vdd-supply = <&vdc_1v8>; + v3p3-supply = <&vdc_3v3>; + v1p2-supply = <&vdc_1v8>; + adi,dsi-lanes = <4>; + #sound-dai-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7535_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + adv7535_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + }; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dp0 { + status = "okay"; +}; + +&mdss_dp0_out { + data-lanes = <0 1 2 3>; + link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; +}; + +&mdss_dp0_phy { + status = "okay"; +}; + +&mdss_dsi0 { + status = "okay"; +}; + +&mdss_dsi0_out { + remote-endpoint = <&adv7535_in>; + data-lanes = <0 1 2 3>; +}; + +&mdss_dsi0_phy { + status = "okay"; +}; + +&pcie0 { + pinctrl-0 = <&pcie0_default_state>; + pinctrl-names = "default"; + + vddpe-3v3-supply = <&vdc_3v3>; +}; + +&pcie1 { + pinctrl-0 = <&pcie1_default_state>; + pinctrl-names = "default"; + + vddpe-3v3-supply = <&vreg_nvme>; +}; + +&pcieport0 { + reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; + + pci@0,0 { + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x01 0xff>; + ranges; + reg = <0x010000 0x00 0x00 0x00 0x00>; + + pci@2,0 { + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x00 0xff>; + ranges; + reg = <0x021000 0x00 0x00 0x00 0x00>; + + usb@0 { + compatible = "pci104c,8241"; + reg = <0 0 0 0 0>; + ti,pwron-active-high; + }; + }; + }; +}; + +&pcieport1 { + reset-gpios = <&tlmm 23 GPIO_ACTIVE_LOW>; +}; + +&tlmm { + pcie0_default_state: pcie0-default-state { + wake-pins { + pins = "gpio0"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + + clkreq-pins { + pins = "gpio1"; + function = "pcie0_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-pins { + pins = "gpio2"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + ethernet0_default: ethernet0-default-state { + ethernet0_mdc: ethernet0-mdc-pins { + pins = "gpio5"; + function = "emac0_mdc"; + drive-strength = <16>; + bias-pull-up; + }; + + ethernet0_mdio: ethernet0-mdio-pins { + pins = "gpio6"; + function = "emac0_mdio"; + drive-strength = <16>; + bias-pull-up; + }; + }; + + max98091_default: max98091-default-state { + pins = "gpio16"; + function = "gpio"; + bias-pull-up; + }; + + pcie1_default_state: pcie1-default-state { + wake-pins { + pins = "gpio21"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + + clkreq-pins { + pins = "gpio22"; + function = "pcie1_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-pins { + pins = "gpio23"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + gpio_keys_default: gpio-keys-default-state { + pins = "gpio79"; + function = "gpio"; + bias-disable; + }; + + adv7535_default: adv7535-default-state { + pins = "gpio93"; + function = "gpio"; + bias-pull-up; + }; +}; + +&uart7 { + status = "okay"; +}; + +&usb_1 { + status = "okay"; +}; + +/* Internally connected to the MCU (e.g. for DFU). */ +&usb_2 { + dr_mode = "host"; + + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi new file mode 100644 index 0000000000000..9b5ed55939b86 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi @@ -0,0 +1,323 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include + +#include "monaco.dtsi" +#include "monaco-pmics.dtsi" + +/ { + /* This comes from a PMIC handled within the SAIL domain */ + vreg_s2s: vreg-s2s { + compatible = "regulator-fixed"; + regulator-name = "vreg_s2s"; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "a"; + + vreg_l3a: ldo3 { + regulator-name = "vreg_l3a"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + regulator-always-on; + }; + + vreg_l4a: ldo4 { + regulator-name = "vreg_l4a"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l5a: ldo5 { + regulator-name = "vreg_l5a"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l6a: ldo6 { + regulator-name = "vreg_l6a"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l7a: ldo7 { + regulator-name = "vreg_l7a"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8a: ldo8 { + regulator-name = "vreg_l8a"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l9a: ldo9 { + regulator-name = "vreg_l9a"; + regulator-min-microvolt = <2970000>; + regulator-max-microvolt = <3072000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-1 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "c"; + + vreg_s5c: smps5 { /* LPDDR VDD2H */ + regulator-name = "vreg_s5c"; + regulator-min-microvolt = <1104000>; + regulator-max-microvolt = <1104000>; + regulator-initial-mode = ; + }; + + vreg_l1c: ldo1 { /* LPDDR VDDQ */ + regulator-name = "vreg_l1c"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <512000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l2c: ldo2 { /* LPDDR VDD2L */ + regulator-name = "vreg_l2c"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <904000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l4c: ldo4 { + regulator-name = "vreg_l4c"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l7c: ldo7 { + regulator-name = "vreg_l7c"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8c: ldo8 { /* LPDDR VDD1 */ + regulator-name = "vreg_l8c"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l9c: ldo9 { /* QFPROM */ + regulator-name = "vreg_l9c"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; +}; + +&mdss_dp0 { + pinctrl-0 = <&dp_hpd>; + pinctrl-names = "default"; +}; + +&mdss_dp0_phy { + vdda-phy-supply = <&vreg_l5a>; + vdda-pll-supply = <&vreg_l4a>; +}; + +&mdss_dsi0 { + vdda-supply = <&vreg_l5a>; +}; + +&mdss_dsi0_phy { + vdds-supply = <&vreg_l4a>; +}; + +&gpi_dma0 { + status = "okay"; +}; + +&gpi_dma1 { + status = "okay"; +}; + +&gpu { + status = "okay"; +}; + +&gpu_zap_shader { + firmware-name = "qcom/qcs8300/a623_zap.mbn"; +}; + +&iris { + status = "okay"; +}; + +/* PCIe0 Gen4 x2 */ +&pcie0 { + iommu-map = <0x0 &pcie_smmu 0x0000 0x1>, + <0x100 &pcie_smmu 0x0001 0x1>, + <0x200 &pcie_smmu 0x0007 0x1>, + <0x208 &pcie_smmu 0x0002 0x1>, + <0x210 &pcie_smmu 0x0003 0x1>, + <0x218 &pcie_smmu 0x0004 0x1>, + <0x300 &pcie_smmu 0x0005 0x1>, + <0x400 &pcie_smmu 0x0006 0x1>; + + status = "okay"; +}; + +&pcie0_phy { + vdda-phy-supply = <&vreg_l6a>; + vdda-pll-supply = <&vreg_l5a>; + + status = "okay"; +}; + +/* PCIe1 Gen4 x4 */ +&pcie1 { + status = "okay"; +}; + +&pcie1_phy { + vdda-phy-supply = <&vreg_l6a>; + vdda-pll-supply = <&vreg_l5a>; + + status = "okay"; +}; + +&qupv3_id_0 { + firmware-name = "qcom/qcs8300/qupv3fw.elf"; + + status = "okay"; +}; + +&qupv3_id_1 { + firmware-name = "qcom/qcs8300/qupv3fw.elf"; + status = "okay"; +}; + +/* There is a HW/FW issue preventing proper REFGEN hardware voting + * for the USB2 HS PHY. As a workaround, we force REFGEN to stay + * always‑on in software, matching initial bootloader config. + */ +&refgen { + regulator-always-on; +}; + +&remoteproc_adsp { + firmware-name = "qcom/qcs8300/adsp.mbn"; + + status = "okay"; +}; + +&remoteproc_cdsp { + firmware-name = "qcom/qcs8300/cdsp0.mbn"; + + status = "okay"; +}; + +&remoteproc_gpdsp { + firmware-name = "qcom/qcs8300/gpdsp0.mbn"; + + status = "okay"; +}; + +/* OnSom eMMC */ +&sdhc_1 { + vmmc-supply = <&vreg_l8a>; + vqmmc-supply = <&vreg_s2s>; + + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + + no-sd; + no-sdio; + non-removable; + + status = "okay"; +}; + +/* Ethernet/SGMII */ +&serdes0 { + phy-supply = <&vreg_l5a>; + + status = "okay"; +}; + +&tlmm { + dp_hpd: dp-hpd-state { + pins = "gpio94"; + function = "edp0_hot"; + bias-disable; + }; +}; + +/* USB0 HS + SS */ +&usb_1_hsphy { + vdda-pll-supply = <&vreg_l7a>; + vdda18-supply = <&vreg_l7c>; + vdda33-supply = <&vreg_l9a>; + + status = "okay"; +}; + +&usb_qmpphy { + vdda-phy-supply = <&vreg_l7a>; + vdda-pll-supply = <&vreg_l5a>; + + status = "okay"; +}; + +/* USB1 HS */ +&usb_2_hsphy { + vdda-pll-supply = <&vreg_l7a>; + vdda18-supply = <&vreg_l7c>; + vdda33-supply = <&vreg_l9a>; + + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi index c7fd5409db406..6e33f9c003f39 100644 --- a/arch/arm64/boot/dts/qcom/monaco.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi @@ -2807,6 +2807,74 @@ }; }; + + lpass_tlmm: pinctrl@3440000 { + compatible = "qcom,qcs8300-lpass-lpi-pinctrl", "qcom,sm8450-lpass-lpi-pinctrl"; + reg = <0x0 0x03440000 0x0 0x20000>, + <0x0 0x034d0000 0x0 0x10000>; + + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&lpass_tlmm 0 0 23>; + + quad_mclk_active: quad-mclk-state { + clk-pins { + pins = "gpio5"; + function = "ext_mclk1_c"; + drive-strength = <8>; + bias-disable; + }; + }; + + quad_mi2s_active: quad-active-state { + data-pins { + pins = "gpio2", "gpio3"; + function = "qua_mi2s_data"; + drive-strength = <8>; + bias-disable; + }; + + sclk-pins { + pins = "gpio0"; + function = "qua_mi2s_sclk"; + drive-strength = <8>; + bias-disable; + }; + + ws-pins { + pins = "gpio1"; + function = "qua_mi2s_ws"; + drive-strength = <8>; + bias-disable; + }; + }; + + lpi_i2s4_active: lpi_i2s4-active-state { + data0-pins { + pins = "gpio17"; + function = "i2s4_data"; + drive-strength = <8>; + bias-disable; + }; + + clk-pins { + pins = "gpio12"; + function = "i2s4_clk"; + drive-strength = <8>; + bias-disable; + }; + + ws-pins { + pins = "gpio13"; + function = "i2s4_ws"; + drive-strength = <8>; + bias-disable; + }; + }; lpass_ag_noc: interconnect@3c40000 { compatible = "qcom,qcs8300-lpass-ag-noc"; reg = <0x0 0x03c40000 0x0 0x17200>;