rockusb: erase carries no data phase, so its CBW must declare zero length

[widgetii]

What

build_cbw() defaulted the CBW's dCBWDataTransferLength to
count * SECTOR_SIZE whenever a count was given. That is correct for
READ_LBA/WRITE_LBA, but ERASE_LBA and ERASE_NORMAL carry their sector
count in the CDB while moving no data.

With a nonzero transfer length declared for an erase, the usbplug waits for a
data phase that never arrives. On an RV1106 this surfaces as:

moved -1024 of 0 bytes (residue 1024)

and the erase never lands — which blocks erase-before-write flows (e.g. clearing
stale UBI PEBs before writing a fresh image).

Fix

Exclude ERASE_LBA/ERASE_NORMAL from the count * SECTOR_SIZE default, so
their CBW declares a zero-length transfer. Read/write are unchanged.

Test

Added TestBuildCbwEraseTransfer:

• erase opcodes produce a CBW with dCBWDataTransferLength == 0
• READ_LBA/WRITE_LBA still declare count * SECTOR_SIZE

744 passed, 2 skipped

Verified on hardware: with this fix, ERASE_LBA clears the target region
(reads back 0xff) on an RV1106 SPI-NAND, where before it failed with the
residue error above.

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PR Summary by Qodo

Fix zero-length RockUSB erase CBWs

🐞 Bug fix 🧪 Tests 🕐 10-20 Minutes

AI Description

• Prevent erase CBWs from advertising a data phase that Rockchip usbplugs await indefinitely.
• Preserve sector-sized transfer defaults for LBA reads and writes.
• Add regression coverage for erase opcodes and unchanged read/write framing.

Diagram

graph TD
  A["CBW Builder"] --> B{"Erase opcode?"} -- Yes --> C["Zero length"] --> F["CBW Wrapper"]
  B -- No --> D{"Count present?"} -- Yes --> E["Sector bytes"] --> F
  D -- No --> C

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High-Level Assessment

The targeted opcode exclusion is the lowest-risk approach because it fixes erase framing without changing established defaults for read, write, or unknown integer opcodes. Restricting inference exclusively to read/write opcodes or changing the API to distinguish an omitted transfer length from explicit zero would be more invasive without improving this fix.

Files changed (2) +42 / -2

Bug fix (1) +11 / -2

protocol.pyDeclare zero-length data phases for erase CBWs +11/-2

Declare zero-length data phases for erase CBWs

• Excludes ERASE_LBA and ERASE_NORMAL from count-based transfer-length inference because their counts live only in the CDB. This prevents usbplugs from waiting for nonexistent erase payloads while preserving existing read/write behavior.

src/defib/rockusb/protocol.py

Tests (1) +31 / -0

test_rockusb_device.pyCover erase and block-transfer CBW lengths +31/-0

Cover erase and block-transfer CBW lengths

• Adds regression tests confirming both erase opcodes advertise zero transferred bytes. It also verifies READ_LBA and WRITE_LBA still derive their transfer lengths from sector count.

tests/test_rockusb_device.py