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boards: seeed: xiao_nrf54lm20a: commit RRAM write-buffer after flash load - #115162

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boards: seeed: xiao_nrf54lm20a: commit RRAM write-buffer after flash load#115162
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lboue:boards-seeed-xiao_nrf54lm20a-fix-openocd-rram-commit

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@lboue

@lboue lboue commented Aug 2, 2026

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The nrf54lm20a-load OpenOCD proc (boards/seeed/xiao_nrf54lm20a/support/openocd.cfg) flashes with load_image but never commits the RRAM controller's internal write-buffer. The final (partial) 128-bit write line is left uncommitted, so the last ~16 bytes of the flashed image are never programmed.

Whatever data lands at the tail of the image is silently corrupted. In one observed case (a Zephyr HCI controller build), the tail held net_buf pool structs at the end of the initialized-data region, so hci_rx_pool's alloc/__bufs pointers were left NULL. The controller then took a MemManage fault (data access near address 0x0) when allocating an event buffer to answer the first received HCI command -- presenting as a controller that is simply "silent," with no obvious cause. It's layout-sensitive, so unrelated config changes (e.g. enabling CONFIG_LOG) can appear to "fix" or "break" it by shifting what lands in the dropped tail.

Fix

Trigger RRAMC.TASKS_COMMITWRITEBUF (0x5004e008) after load_image to flush the write-buffer so the final line is programmed. Register offsets per the nRF54LM20A MDK (RRAMC base 0x5004e000, TASKS_COMMITWRITEBUF @ 0x008).

This is the same fix as Seeed's own out-of-tree copy of this board (Seeed-Studio/platform-seeedboards#59) -- porting it here since this in-tree board file still has the bug.

Testing

Verified locally against this board (real hardware, XIAO nRF54LM20A):

  • Forced the image tail to a known-wrong value and reproduced the drop: load_image without the commit left the tail unchanged.
  • With this change, west flash programs the tail to exactly match the built hex, byte for byte.
  • Firmware covering several peripherals (I2C sensor, GPIO, logging/console) runs correctly across resets with this fix applied.

Note: I separately have an open, unresolved issue with BLE advertising never being detected by a scanner on this same board, with and without this fix applied (Seeed-Studio/platform-seeedboards#65) -- unrelated as far as I can tell (this fix only affects the fixed tail bytes of whatever image is flashed, and the BLE symptom is present independent of what's at the tail), but flagging it here in case it turns out to matter.

…load

The nrf54lm20a-load OpenOCD proc flashes with load_image but never
commits the RRAM controller's internal write-buffer. The final
(partial) 128-bit write line is left uncommitted, so the last ~16
bytes of the flashed image are never programmed.

Whatever data lands at the tail of the image is silently corrupted.
In one observed case (a Zephyr HCI controller build), the tail held
net_buf pool structs at the end of the initialized-data region, so
hci_rx_pool's alloc/__bufs pointers were left NULL, and the
controller took a MemManage fault (data access near address 0x0)
when allocating an event buffer to answer the first received HCI
command -- presenting as a controller that is simply "silent", with
no obvious cause. It is layout-sensitive, so unrelated config changes
(e.g. enabling CONFIG_LOG) can appear to "fix" or "break" it by
shifting what lands in the dropped tail.

Trigger RRAMC.TASKS_COMMITWRITEBUF (0x5004e008) after load_image to
flush the write-buffer so the final line is programmed. Register
offsets per the nRF54LM20A MDK (RRAMC base 0x5004e000, TASKS_COMMITWRITEBUF
@ 0x008).

Same fix as Seeed's own out-of-tree board copy
(Seeed-Studio/platform-seeedboards#59); ported here since this
in-tree board file still has the bug. Verified locally: west flash
programs the tail to exactly match the built hex, and firmware built
against this checkout (ESPHome's zephyr platform, targeting this
board) runs correctly across resets, where it previously did not.

Signed-off-by: Ludovic BOUÉ <938089+lboue@users.noreply.github.com>
@github-actions

github-actions Bot commented Aug 2, 2026

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Hello @lboue, and thank you very much for your first Pull Request (PR) to the Zephyr Project!

All PRs must pass our Continuous Integration (CI) pipeline before merging. When the pipeline run for your PR completes, you are expected to investigate the results, fix any errors, and update your PR for a fresh round of review.

Since this is your first contribution, a project community member must manually approve your CI run (this helps us avoid abuse of our CI system). A bot should assign some reviewers who can start the run for you soon.

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sonarqubecloud Bot commented Aug 2, 2026

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